Local phase transformations during current-induced forming and degradation in TiN/HfO₂/Pt metal/oxide/metal heterostructures

Abstract

This work investigates how current-induced forming and electrical stressing give rise to local structural and compositional transformations in TiN/HfO₂/Pt metal/oxide/metal devices used as model resistive memory cells. TiN/HfO₂/Pt structures with an approximately nine-nanometre-thick atomic-layer-deposited HfO₂ layer and device diameters of 5–20 micrometres were fabricated using CMOS-compatible processes. Electrical current–voltage and conductance–current characteristics were combined with in situ X-ray diffraction under bias and ex situ focused-ion-beam-prepared transmission electron microscopy and scanning electron microscopy, including energy-dispersive X-ray spectroscopy, on devices with well-documented electrical histories. Pristine devices showed uniform, area-scaled leakage currents of a few tens of nanoamperes at 0.1 volt, indicating a structurally homogeneous oxide. Electrical forming occurred reproducibly at about 2.5–3.0 volts with current compliance in the 100–500 microampere range and produced low-resistance states with conductance of approximately 2–3 millisiemens. With increasing cycle number and stronger current stressing, low-resistance conductance increased in a statistically significant way, while parts of the conductance–current curves became irreversible. In situ X-ray diffraction revealed the emergence of weak additional diffraction features attributed to transformed hafnium oxide only after strong current loading, while the metal electrodes remained largely unchanged. Cross-sectional microscopy showed that these electrical changes correlate with the appearance of localized filament-like regions, oxygen-deficient zones and mild interfacial reactions near the top electrode. Taken together, these observations establish a direct correlation between electrical forming and degradation regimes and spatially confined structural transformations within the HfO₂ layer and at metal/oxide interfaces. This understanding provides a basis for engineering more reliable resistive memory devices by defining electrical stress windows that avoid the onset of irreversible structural changes.